"Improving Predictability in Semiconductor Patent Examinations"

[Financial News] The Ministry of Intellectual Property announced on the 9th that it has established and will distribute the "Practical Guidelines for Patent Examination in the Semiconductor Field," which set out criteria for patent assessment in the semiconductor sector.
The semiconductor industry is rapidly advancing in miniaturization, integration, and speed, driven by technologies such as Extreme Ultraviolet Lithography (EUV), amorphous carbon hard masks, High Bandwidth Memory (HBM), and next-generation AI semiconductors including Neural Processing Unit (NPU) and Processing-in-Memory (PIM).
Industry stakeholders have therefore called for patent examinations that better reflect the specific characteristics of the semiconductor sector.
Reflecting feedback from the semiconductor field that clear standards are needed for assessing patentability, the Ministry of Intellectual Property identified and carefully selected frequently occurring real examination cases.
It then organized them by legal provision and type of patentability issue to develop the "Practical Guidelines for Patent Examination in the Semiconductor Field."
The guidelines cover requirements for the description of the invention, including methods for determining whether the invention is sufficiently disclosed to be carried out.
They also address requirements for the claims, such as how to assess unclear claim language, and patentability requirements like inventive step, including how to judge the ease of combining prior art and cases of mere design modification.
For each of these three key areas, the guidelines identify frequently occurring types of issues and present actual semiconductor examination cases along with methods for assessment. They also include guidance on determining the patentability of "product-by-process (PBP) claims" that limit a product by its manufacturing method, which often arise in the semiconductor field. The Ministry of Intellectual Property will publish the new Practical Guidelines for Patent Examination in the Semiconductor Field on its website. To improve understanding among stakeholders from industry, academia, and research in the semiconductor sector, it also plans to hold a briefing session next month for members of the Semiconductor IP Council. Kim Heetae, Head of the Semiconductor Examination Promotion Division at the Ministry of Intellectual Property, said, "By establishing these Practical Guidelines for Patent Examination in the Semiconductor Field, we expect to enhance consistency in examinations and help Korean semiconductor companies secure high-quality patents." He added, "We also expect the guidelines to serve as a practical manual for small and medium-sized enterprises, including fabless companies and materials, parts, and equipment firms that previously lacked the capacity to develop intellectual property strategies, enabling them to draft high-quality specifications."
kwj5797@fnnews.com Kim Won-jun Reporter